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Erzengel
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On modern CPUs, we have different levels of cache (L1, L2, etc). The lower the number, the smaller the cache, closer to the CPU, and faster the access time. The reason for this is that being even marginally farther away reduces access speeds, and being larger necessitates portions of the memory being further away physically and thus take more time for electrical impulses to travel. At the 3 to 4 gigahertz (0.33 to 0.25 nanoseconds per clock cycle) timescales we\'re dealing with, these micrometers are significant and mean that retrieving from L2 cache and beyond takes more than a clock cycle simply due to limits in speed of light.
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On modern CPUs, we have different levels of cache (L1, L2, etc). The lower the number, the smaller the cache, closer to the CPU, and faster the access time. The reason for this is that being even marginally farther away reduces access speeds, and being larger necessitates portions of the memory being further away physically and thus take more time for electrical impulses to travel. At the 3 to 4 gigahertz (0.33 to 0.25 nanoseconds per clock cycle) timescales we\\\'re dealing with, these micrometers are significant and mean that retrieving from L2 cache and beyond takes more than a clock cycle simply due to limits in speed of light in silicon.
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As an Electronics and Software Engineer (designs computers), I see many engineering reasons to keep at least essential processing and cache close to the sensors. However, like modern computers, it would also be wise to keep long term storage someplace further away.
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As an Electronics and Software Engineer (designs computers), I see many engineering reasons to keep at least essential processing and cache close to the sensors. However, like modern computers, it would also be wise to keep long term storage someplace further away to be paged into the cache as needed.
